Nvidia Paid MediaTek $3.5bn. The Real Deal Is NVHBM.
Nvidia bought $3.5 billion of convertible bonds issued by MediaTek on August 31. Most of the coverage filed it under circular financing, which is a fair instinct given how many of Nvidia's recent checks have gone to its own customers.
The technical terms attached to the deal point somewhere else. MediaTek is adopting NVLink Fusion, and inside that, NVHBM. If you follow memory rather than accelerators, NVHBM is the part of this announcement that will still matter in two years.
KEY TAKEAWAYS
1. MediaTek is a Taiwanese fabless designer and the largest smartphone application processor vendor by units. Counterpoint Research has its share falling from 38% in Q1 2025 to 32% in Q1 2026 as the memory shortage wiped out budget handsets.
2. That pressure is why it is pivoting. MediaTek doubled its 2026 AI ASIC revenue target to $2 billion and is targeting 10% to 15% of a custom-silicon market it sizes at $70 billion to $80 billion in 2027.
3. NVHBM moves Nvidia's memory controller off the XPU die and into the HBM base die. Nvidia claims up to 30% more bandwidth per stack, 15% lower HBM power and 25% more usable compute-die area versus standard HBM4E. Nvidia will not manufacture it; the memory makers will, to Nvidia's spec.
What was actually announced
The joint release covers three areas: AI infrastructure, local AI computing and automotive.
On infrastructure, MediaTek adopts the NVLink Fusion platform — the NVLink Fusion chiplet, NVLink-C2C for connecting XPUs to Nvidia Rosa CPUs, and NVHBM for memory. On PCs, the two companies extend the work that produced the GB10 Grace Blackwell Superchip behind DGX Spark into multiple generations of RTX Spark. On automotive, Nvidia technology goes into MediaTek's Dimensity Auto platforms.
Two numbers circulating in coverage of this deal are worth correcting.
First, the Amazon comparison. What AWS committed to on August 26 was 2 million additional Nvidia GPUs across 2027 and 2028, not two million components, with a separate 100,000-GPU buildout for US federal and national-security workloads. Added to the March GTC commitment of more than one million, the publicly disclosed total is above three million GPUs.
That same announcement named Amazon's Annapurna Labs as the first disclosed NVHBM collaborator, with future Trainium silicon using NVLink Fusion and NVHBM together. MediaTek is the second name in that column, not the first.
Second, the market-share figure. MediaTek's stated goal is 10% to 15% of a 2027 custom AI chip market it estimates at $70 billion to $80 billion. Taiwanese trade press reported in August that the company has since raised the 2027 share goal to 15% to 20%. Either way these are targets, not results.
One thing is not confirmed at all: the customer. MediaTek's first large AI accelerator program is widely assumed to sit inside Google's TPU pipeline, but neither company has ever named it. The official language stops at "a US hyperscaler."
Who MediaTek is
Founded in 1997, MediaTek is a Taiwanese fabless designer with no factories of its own; TSMC builds its silicon. Its volume business is the Dimensity family of smartphone SoCs, where it ships more units than anyone else, and it also holds a leading position in Wi-Fi chipsets and TV SoCs.
The weakness in that number one position is where the units sit. MediaTek is concentrated in the entry and mid tiers, and those are exactly the phones that stopped shipping in 2026 as DRAM and NAND prices spiked. Its share fell six points year over year in Q1. Qualcomm slipped too, from 27% to 23%, but more than half of MediaTek's quarterly revenue comes from smartphone SoCs, so it absorbs the shock more directly.
Hence the data center. MediaTek's computing segment passed $1 billion in revenue growing north of 80%, and in April the company doubled its 2026 AI ASIC target from $1 billion to $2 billion. The incumbents it is aiming at are Broadcom and Marvell.
What Nvidia gets, which is not obvious
Read as financial engineering, this looks like Nvidia funding its own demand. Read structurally, it looks defensive.
Hyperscaler in-house silicon is not reversible at this point. Google has TPUs, Amazon has Trainium, and the design work behind those programs goes to Broadcom, Marvell and now MediaTek. Every one of those chips exists to take some workload off Nvidia GPUs.
NVLink Fusion is the answer to that. If the custom chips are going to get built regardless, Nvidia would rather they be built inside its rack. A custom XPU that attaches to the NVLink fabric lets a customer mix its own silicon with Nvidia GPUs in one rack-scale architecture — while standardizing on Nvidia's interconnect to do it.
Amazon came in first. MediaTek is the more leveraged addition, because MediaTek is not the end customer. It is the design house several hyperscalers use. Signing MediaTek puts multiple future custom chips on Nvidia's standard in a single agreement.
NVHBM is the memory story
Nvidia introduced NVHBM on August 26, alongside its second-quarter results. The change is one sentence: the memory controller moves off the XPU compute die and into the HBM base die.
In a standard implementation the controller sits on the accelerator die. It and a wide PHY consume leading-edge silicon that could otherwise be compute. Push the controller down into the base die of the 3D stack, narrow the interface, and that area comes back.
Nvidia's stated numbers against HBM4E: up to 30% more bandwidth per stack, up to 15% lower HBM power, up to 25% more usable XPU compute-die area, and up to 67% less PHY and support-circuit area, netting out to as much as 30% better XPU performance. Every one of those is a vendor figure. There is no third-party measurement and no shipping product.
The part that matters for anyone tracking Samsung, SK hynix and Micron is what Nvidia is not doing. It is not making DRAM. Nvidia says it is establishing a standard NVHBM implementation available from multiple memory providers — meaning the three memory makers build it, and Nvidia writes the base-die spec.
That cuts both ways for the suppliers. Custom parts price above commodity and raise the barrier to entry, which is good. But custom parts cannot be reallocated to another customer if a program slips, and specification authority shifts toward the buyer. HBM is moving from a component you build to a standard and sell, toward a component you build to a customer's design.
What I actually watch
| Indicator | Where it stands | Where to look |
|---|---|---|
| NVHBM suppliers | "Multiple providers" is all Nvidia has said; no names | Custom-HBM commentary on memory maker calls |
| NVHBM validation | Vendor figures only | Shipping products, conference papers, third-party tests |
| NVLink Fusion adopters | Annapurna Labs, then MediaTek | The next name, and how Broadcom and Marvell respond |
| MediaTek ASIC revenue | $2 billion for 2026 is a target | Reported quarterly data center revenue |
| Convertible bond terms | Conversion price, dilution and use of proceeds undisclosed | MediaTek's Taiwan exchange filings |
Value chain read-through
| Segment | Read-through |
|---|---|
| HBM suppliers | Better pricing and a higher barrier, against lower inventory fungibility and less specification control. The direction of travel is away from commodity HBM. |
| Base-die foundry | A custom base die with an integrated controller is a bigger, more logic-heavy die than a standard one, which pulls more value toward the foundry step. |
| ASIC design houses | A prevalidated interconnect and memory block shortens time to market. It also standardizes what used to be a differentiator. |
| Nvidia | Keeps a position in racks it does not fully own, via interconnect and memory specification rather than GPU share. |
Risks to this view
- The NVHBM numbers are entirely vendor-stated. Bandwidth, power and area claims all come from Nvidia, with no independent measurement and no product in the field. Custom base dies also carry heavier yield and qualification burdens than standard parts.
- Custom HBM is genuinely double-edged for the memory makers. Pricing improves; flexibility and specification authority do not. Each generation adds per-customer requalification work.
- The circular-financing question is not settled. The convertible terms were not disclosed, so there is no basis to judge the economics. Deals structured this way get repriced first when sentiment on AI capex turns.
- MediaTek's targets sit far ahead of its results. The $2 billion for 2026 and the $7 billion to $12 billion implied for 2027 are company goals, set while the core smartphone SoC business is losing volume to memory costs.
Where this leaves the memory read
MediaTek is converting itself from a phone chip company into a custom AI silicon design house, and Nvidia just handed it both funding and a specification. MediaTek gets $3.5 billion and a prevalidated interconnect and memory stack. Nvidia gets custom silicon that was heading out of its rack, staying inside it.
The layer worth watching is the bottom one. A structure where Nvidia writes the HBM base-die specification and the three memory makers build to it is, among other things, a statement about where bargaining power in HBM is heading. A few more custom-HBM design wins and that stops being an inference and becomes a trend.
Sources: NVIDIA and MediaTek joint press release, August 31, 2026; NVIDIA blog on NVLink Fusion and NVHBM, August 26, 2026, plus accompanying technical materials; AWS and NVIDIA joint release, August 26, 2026; NVIDIA Q2 FY2027 results and SEC Form 8-K; Counterpoint Research smartphone AP/SoC share, Q1 2026; MediaTek earnings calls, Computex briefing and analyst day, April to August 2026; DigiTimes, August 17, 2026; TrendForce, April 30, 2026; Bloomberg and Reuters, August 31, 2026.
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