Samsung and NVHBM: Why NVIDIA Reportedly Wants 8-High HBM4E

 A day after NVIDIA unveiled NVHBM, a Korean exclusive reported that Samsung is developing an 8-high HBM4E at 17-18 Gbps for it — the opposite of the stack-higher race. A follow-up to our NVHBM explainer, separating what is confirmed from what is reported.

What was reported — and what is actually confirmed

The backbone of this post is a Seoul Economic Daily exclusive (August 28, citing unnamed industry sources). Neither Samsung nor NVIDIA has confirmed it, so let's layer the claims:

  • Reported (unconfirmed): Samsung is developing an 8-high HBM4E at NVIDIA's request, with a target pin speed of 17-18 Gbps, for use in NVHBM; first application likely in Rubin Ultra.
  • Confirmed (Samsung, May 29): world-first HBM4E 12-high sample shipment at 14-16 Gbps per pin, 4.0 TB/s per stack, 48GB, built on 1c DRAM plus Samsung's own 4nm foundry logic base die — with 32GB 8-high and 64GB 16-high in the planned lineup.
  • Confirmed (NVIDIA): NVHBM unveiled August 26; Rubin Ultra NVL576 due in 2H 2027 with 576 compute dies per rack.

On speed: Samsung's HBM4 demonstrated 11.7 Gbps in final SiP qualification, and its HBM4E 12-high sample was officially announced at 14-16 Gbps. The reported ask of 17-18 Gbps sits 6-13% above the top of that official range — a speed class no vendor has formally announced.

1. Why 8-high? The stacking race just inverted


HBM competition has always climbed: 4-high, 8-high, 12-high, 16-high. Each added layer requires thinner DRAM dies and more precise stacking, raising back-end difficulty and yield risk. Stack count is yield, and yield is effective supply.

Choosing 8-high inverts that formula. Per-stack capacity drops from 48GB (12-high) to 32GB, but the lower yield burden means more sellable stacks per wafer. With forecasts of memory shortages potentially stretching toward 2030, the reported choice reads as NVIDIA prioritizing supply volume and speed over per-stack capacity.

2. Making up the capacity at the system level: NVL576


The report points to Rubin Ultra, due in 2H 2027, as NVHBM's first application. Its Kyber rack (NVL576) scales the NVLink domain from today's 72 GPUs to 576 compute dies — precisely, 144 quad-die packages.

Even if each GPU carries less memory, tying together hundreds of compute dies with faster HBM grows total system memory and bandwidth. This fits squarely with the NVHBM architecture we covered — the controller moving into the base die, up to 30% more bandwidth — and NVIDIA's NVLink-centric scaling strategy.


For reference, converting 17-18 Gbps over the HBM4-class 2,048-bit interface yields roughly 4.4-4.6 TB/s per stack (illustrative calculation) — one step above Samsung's official 3.0 TB/s (HBM4) and 4.0 TB/s (HBM4E sample).

3. The "turnkey" argument, re-read: NVIDIA designs, who manufactures?

The exclusive frames Samsung's edge as turnkey capability spanning DRAM and logic base dies. Overlaid with NVIDIA's own announcement, the nuance shifts: the NVHBM base die is an NVIDIA-led design carrying NVIDIA's custom controller, and NVIDIA has said it will not manufacture it. What memory makers are being asked for is less independent base-die design than the ability to take NVIDIA's design, fabricate it on a logic process, and stack DRAM on top in one flow.

Samsung already builds its HBM4E base die on its own 4nm foundry process, which fits that requirement. SK hynix, by contrast, sources its HBM4 base die from TSMC, so its NVHBM response may take a different shape. And since NVIDIA says NVHBM will be "validated and offered by multiple memory partners," this report does not imply Samsung exclusivity.

Checkpoints

  • Official confirmation: whether Samsung or NVIDIA formalizes the 8-high / 17-18 Gbps spec, and whether other outlets corroborate.
  • The capacity math: public Rubin Ultra material implies 1TB of HBM4e per package (64GB-class over 16 stacks), which does not square neatly with 32GB 8-high — watch for more stacks per package or revised specs.
  • Competitor response: SK hynix and Micron's NVHBM validation participation and base-die sourcing.
  • Timeline: whether NVHBM qualification and production align with Rubin Ultra's 2H 2027 schedule.

Risks

  • The core specs (8-high, 17-18 Gbps) are single-outlet reporting and could change or be denied.
  • 17-18 Gbps is beyond any officially announced speed grade, carrying development and qualification risk.
  • If 8-high custom volumes displace 12/16-high demand, they may conflict with high-stack premium strategies.
  • Pricing and volume terms for custom HBM are undisclosed, so profitability calls are premature.

From a stacking war to a speed-and-supply war — if this report holds, the scoring criteria of HBM competition are changing. We will follow up as official statements and competitor responses land.

Sources: Seoul Economic Daily exclusive (Aug 28, 2026); Samsung Newsroom (May 29, 2026); NVIDIA blog and technical blog (Aug 26, 2026); NVIDIA GTC 2025-2026.

Disclaimer: This post is for informational and educational purposes only. It does not constitute investment advice or a recommendation to buy or sell any security. All investment decisions are your own responsibility.

Comments

Popular posts from this blog

Why Nvidia's Inference GPU Skips HBM for GDDR7

Korea's August Chip Exports Hit a Record $46.7B. Volume Moved Too

DDR4 Costs More Than DDR5 — Unless You're Actually Buying It