A Day Inside a Semiconductor Fab, From Gowning to 24-Hour Shifts

Talk about memory prices or capital spending long enough and the word "fab" comes up every time. What actually happens inside one over a day is less widely known.

This piece follows a semiconductor fab's day using only what companies have published in their newsrooms and press tours, plus the international cleanroom standard: how people get in, how wafers move, and why the factory never stops.

Three points up front

• An ISO Class 3 cleanroom allows at most 35 particles of 0.5 micrometres or larger per cubic metre, about one millionth of typical city air.

• According to Samsung Semiconductor's newsroom, the overhead hoist transport (OHT) vehicles in a single fab travel about 100 km a day.

• A wafer spends roughly 40 to 100 days inside a fab depending on the process, which is why fabs run around the clock on rotating shifts.

What is confirmed and what is not

Confirmed: ISO 14644-1:2015 sets the Class 3 limit at 35 particles (≥0.5µm) per m³. The old US "Class 1" corresponds to ISO 3.

Confirmed: Samsung says OHTs in one fab cover about 100 km a day, 720 km a week and 3,200 km a month (newsroom, September 4, 2025).

Confirmed: Intel does not allow paper, pencils or makeup in its fabs because all three can shed particles (newsroom, March 28, 2018).

Reported: Korean memory production lines run a four-team, three-shift system: three eight-hour shifts with one team off (Maeil Business, July 13, 2023).

Reported: about 90 days from wafer input to finished chip at Samsung's Pyeongtaek line (JoongAng Ilbo press tour, September 7, 2022). Samsung's own newsroom says only "three weeks or more", which should be read as a floor.

Not verified: the widely repeated "30 minutes to gown up". No Korean company has published a figure, and it would vary by company and area anyway.

Arriving: people become particle-free first

The largest source of particles in a fab is people, so entry is essentially a process of packaging the human. Samsung describes a gown, boots, hood, mask and gloves as one set; Intel adds a second pair of gloves. The gown fabric is high-density twill polyester with conductive thread woven in at intervals, so the garment sheds little and static does not attract particles. An air shower then blows remaining particles off the surface.

The reason is line width. On a wafer patterned at tens of nanometres, a single invisible particle can open or short a circuit.

Working: wafers are carried by the ceiling

Carrying wafers by hand largely disappeared with 300mm production. Wafers travel in sealed FOUPs that hold up to 25 each, and OHT vehicles running on ceiling rails lower them onto tool load ports. Samsung says its OHTs cover about 100 km a day in one fab; a 2023 press report put Pyeongtaek P1 at about 1,850 units; Intel discloses 1,700 autonomous vehicles and about 43 km of track at its Oregon D1 complex. Machines move material; engineers monitor tools, read measurement data and trace the cause of defective wafers.

Never closing: cycle time and shifts

Industry estimates compiled by SemiEngineering put logic fab cycle time at about 40 days for 28nm, 80 to 85 days for 7nm and about 100 days for 5nm. These are 2017 estimates and current figures may differ. A product that needs close to three months and hundreds of steps cannot pause: restarting tools disturbs process conditions, and wafers halted mid-flow become a quality risk. So the fab runs every hour of the year, and people split those hours in shifts.

What it means for investors

Seen in numbers, a meaningful share of fab spending goes outside the process tools themselves.

Segment	Role in the fab	Indicator
Cleanroom and HVAC	Particle control	New cleanroom area
Automated transport	Moving wafers	Number of new fabs
Process tools	Running the steps	Capital spending
People	Judgement and upkeep	Hiring volume

TSMC disclosed more than 160,000 m² of cleanroom at Fab 18. Longer cycle times at finer nodes mean more tools and floor space for the same output, one reason supply responds slowly. And the US Semiconductor Industry Association estimated about 67,000 US chip jobs could go unfilled by 2030; people to run a 24-hour fab could become a constraint.

Risks to this view

• Fab construction delays push back cleanroom and transport orders with them.

• Further automation could reduce staffing needs and change shortage forecasts.

• Cycle times and shift systems here are press reports and industry estimates, not company disclosures.

Next: how people actually get into this industry, using published hiring data and Korea's workforce outlook.

Sources

ISO 14644-1:2015 Table 1; Wikipedia "Cleanroom" (urban air reference value); Samsung Semiconductor Newsroom (Apr 12, 2012; Apr 22, 2021; Sep 4, 2025; Apr 15, 2026); Samsung Newsroom photo essay; Intel Newsroom (Mar 28, 2018; "Global Manufacturing"); Maeil Business (Jul 13, 2023); Hankyung (Dec 11, 2022); JoongAng Ilbo (Sep 7, 2022); Asia Business Daily (Feb 6, 2023); SemiEngineering (Feb 16, 2017); TSMC press release (Jan 26, 2018); SIA and Oxford Economics (Jul 25, 2023).

Disclaimer: This post is for informational and educational purposes only. It does not constitute investment advice or a recommendation to buy or sell any security. All investment decisions are your own responsibility.